The present invention relates to electronic switches and, more particularly, to a comparator circuit having hysteresis and controlled switching levels.
Comparator circuits are well known in the art. For example, a typical comparator circuit is comprised of a differetial amplifier the output of which changes states as an input signal applied to one input of the differential amplifier varies above and below a fixed bias potential applied to other input of the differential amplifier. Hysteresis may be provided by typically providing feedback from the output of the differntial amplifier to reduce the bias potential to a second level once the output changes states in response to the input signal exceeding the first bias potential. Hence, the input signal must decrease to a lower value ot switch the output state of the differential amplifier back to its orginal operating state.
A problem with all know prior art comparators is that they require a quiescent or bias current at all times. Thus, there is a need for an improved comparator circuit with hysteresis which requires zero input bias current until such time as an applied input signal exceeds an upper thereshold value wherein the comparator switches outputs states. As the input signal decreases below a lower threshold level, the comparator again requires no input bias current. In addition, it is desirable that the upper and lower switching threshold points have a predetermined or zero temperature coefficient.